nand2tetris/projects/03/b/RAM512.hdl
2021-12-05 09:07:22 +05:30

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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/b/RAM512.hdl
/**
* Memory of 512 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
PARTS:
// Put your code here:
DMux8Way(in=load, sel=address[6..8], a=toRAM64A,
b=toRAM64B,
c=toRAM64C,
d=toRAM64D,
e=toRAM64E,
f=toRAM64F,
g=toRAM64G,
h=toRAM64H);
RAM64(in=in, load=toRAM64A, address=address[0..5], out=fromRAM64A);
RAM64(in=in, load=toRAM64B, address=address[0..5], out=fromRAM64B);
RAM64(in=in, load=toRAM64C, address=address[0..5], out=fromRAM64C);
RAM64(in=in, load=toRAM64D, address=address[0..5], out=fromRAM64D);
RAM64(in=in, load=toRAM64E, address=address[0..5], out=fromRAM64E);
RAM64(in=in, load=toRAM64F, address=address[0..5], out=fromRAM64F);
RAM64(in=in, load=toRAM64G, address=address[0..5], out=fromRAM64G);
RAM64(in=in, load=toRAM64H, address=address[0..5], out=fromRAM64H);
Mux8Way16(sel=address[6..8], out=out, a=fromRAM64A,
b=fromRAM64B,
c=fromRAM64C,
d=fromRAM64D,
e=fromRAM64E,
f=fromRAM64F,
g=fromRAM64G,
h=fromRAM64H);
}