bootloader test dump

05_Computer_Architecture/CPU.v

@@ -54,21 +54,16 @@ module CPU(
     wire [15:0] fromAorM;
     wire [15:0] fromALU;
 
-    reg [15:0] tempM;
-    reg [15:0] tempPC;
-
 
     assign is_C = instruction[15] & instruction[14] & instruction[13];
     assign is_A = ~is_C;
 
-
     assign loadD = is_C & instruction[4];
     assign loadA = (is_C & instruction[5]) || is_A;
 
     assign fromAorM = instruction[12] ? inM : fromA;
     assign toA = is_A ? instruction : outM;
 
-
     // jump if j1 bit set and ng bit set
     // jump if j2 bit set and zr bit set
     // jump if j3 bit set and zr, ng bit not set

05_Computer_Architecture/Clock25_Reset20.v

@@ -13,7 +13,7 @@ module Clock25_Reset20(
     // Put your code here:
     reg boot=1;
     reg [3:0]  ccount=0;
-    reg [12:0] rcount=0;
+    reg [11:0] rcount=0;
 
     always @(posedge CLK) begin
         if (boot == 1) begin