added v2.0

06_IO_Devices/07_RTP/Include.v

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+`include "../../01_Boolean_Logic/Nand.v"
+`include "../../01_Boolean_Logic/Not.v"
+`include "../../01_Boolean_Logic/Buffer.v"
+`include "../../01_Boolean_Logic/And.v"
+`include "../../01_Boolean_Logic/Or.v"
+`include "../../01_Boolean_Logic/Xor.v"
+`include "../../01_Boolean_Logic/Mux.v"
+`include "../../01_Boolean_Logic/DMux.v"
+`include "../../01_Boolean_Logic/Not16.v"
+`include "../../01_Boolean_Logic/Buffer16.v"
+`include "../../01_Boolean_Logic/And16.v"
+`include "../../01_Boolean_Logic/Or16.v"
+`include "../../01_Boolean_Logic/Mux16.v"
+`include "../../01_Boolean_Logic/Or8Way.v"
+`include "../../01_Boolean_Logic/Mux4Way16.v"
+`include "../../01_Boolean_Logic/Mux8Way16.v"
+`include "../../01_Boolean_Logic/DMux4Way.v"
+`include "../../01_Boolean_Logic/DMux8Way.v"
+
+`include "../../02_Boolean_Arithmetic/HalfAdder.v"
+`include "../../02_Boolean_Arithmetic/FullAdder.v"
+`include "../../02_Boolean_Arithmetic/Add16.v"
+`include "../../02_Boolean_Arithmetic/Inc16.v"
+`include "../../02_Boolean_Arithmetic/ALU.v"
+
+`include "../../03_Sequential_Logic/DFF.v"
+`include "../../03_Sequential_Logic/Bit.v"
+`include "../../03_Sequential_Logic/Register.v"
+`include "../../03_Sequential_Logic/PC.v"
+`include "../../03_Sequential_Logic/BitShift9R.v"
+`include "../../03_Sequential_Logic/BitShift8L.v"
+
+`include "../../06_IO_Devices/UartTX.v"
+`include "../../06_IO_Devices/UartRX.v"
+`include "../../06_IO_Devices/SPI.v"
+`include "../../06_IO_Devices/InOut.v"
+`include "../../06_IO_Devices/SRAM_D.v"
+`include "../../06_IO_Devices/GO.v"
+`include "../../06_IO_Devices/LCD.v"
+`include "../../06_IO_Devices/RTP.v"

06_IO_Devices/07_RTP/RTP_tb.gtkw

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+[*]
+[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
+[*] Mon Jan  2 15:25:24 2023
+[*]
+[dumpfile] "/home/micha/gitlab/nand2tetris-fpga/06_IO_Devices/07_RTP/RTP_tb.vcd"
+[dumpfile_mtime] "Mon Jan  2 15:24:52 2023"
+[dumpfile_size] 898324
+[savefile] "/home/micha/gitlab/nand2tetris-fpga/06_IO_Devices/07_RTP/RTP_tb.gtkw"
+[timestart] 0
+[size] 1920 963
+[pos] -1 -1
+*-22.000000 2190000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] RTP_tb.
+[sst_width] 281
+[signals_width] 160
+[sst_expanded] 1
+[sst_vpaned_height] 259
+@28
+RTP_tb.clk
+@200
+-IN
+@28
+RTP_tb.load
+@22
+RTP_tb.in[15:0]
+@28
+RTP_tb.RTP.SDI
+@200
+-OUT
+@28
+RTP_tb.RTP.SDO
+RTP_tb.RTP.SCK
+@22
+RTP_tb.out[15:0]
+@200
+-CMP
+@29
+RTP_tb.SDO_cmp
+@28
+RTP_tb.SCK_cmp
+@22
+RTP_tb.out_cmp[15:0]
+@200
+-Test
+@28
+RTP_tb.fail
+[pattern_trace] 1
+[pattern_trace] 0

06_IO_Devices/07_RTP/RTP_tb.v

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+`timescale 10ns/1ns
+`default_nettype none
+
+module RTP_tb();
+
+	// IN,OUT
+	reg clk = 0;
+	reg load = 0;
+	reg [15:0] in = 0;
+	wire [15:0] out;
+	wire SDO;
+	reg SDI=0;
+	wire SCK;
+
+	// Part
+	RTP RTP(
+    	.clk(clk),
+		.load(load),
+		.in(in),
+		.out(out),
+		.SDO(SDO),
+		.SDI(SDI),
+		.SCK(SCK)
+	);
+	
+	// Simulate
+	always #2 clk=~clk;
+	wire trigger;
+	assign trigger = (n==20) || (n==420) || (n==820) || (n==1220) || (n==1620);
+	always @(posedge clk) begin
+		in <= trigger?$random&16'h03ff:in;	
+		load <= trigger;
+	end
+
+	always @(posedge SCK_cmp)
+		SDI <= $random;
+	// Compare
+	reg[8:0] bits=0;
+	always @(posedge clk)
+		bits <= load?1:((bits==256)?0:(busy?bits+1:0));
+	wire busy=|bits[8:0];
+	wire [15:0] out_cmp = {busy,7'd0,shift};
+	reg [7:0] shift=0;
+	wire tr=~|bits[3:0]&busy;
+	reg lsb=0;
+	always @(posedge clk)
+		lsb<=(tr&SCK_cmp)?SDI:lsb;
+	always @(posedge clk)
+		shift <= load?in[7:0]:((tr&~SCK_cmp)?{shift[6:0],lsb}:shift);
+	reg SCK_cmp=0;
+	always @(posedge clk)
+		SCK_cmp <= load?1:(tr&busy&~bits[8])?~SCK_cmp:SCK_cmp;
+	wire SDO_cmp;
+	assign SDO_cmp = shift[7];	
+	reg fail = 0;
+	reg [31:0] n = 0;
+	task check;
+		#4
+		if ((out!=out_cmp)||(SCK!=SCK_cmp)||(SDO!=SDO_cmp))
+			begin
+				$display("FAIL: clk=%1b, load=%1b, in=%16b, out=%16b, SDO=%1b, SDI=%1b, SCK=%1b",clk,load,in,out,SDO,SDI,SCK);
+				fail=1;
+			end
+	endtask
+
+	initial begin
+		$dumpfile("RTP_tb.vcd");
+  		$dumpvars(0, RTP_tb);
+		
+		$display("------------------------");
+		$display("Testbench: RTP");
+
+		for (n=0; n<2000;n=n+1) 
+				check();
+		
+		if (fail==0) $display("passed");
+		$display("------------------------");
+		$finish;
+	end
+
+endmodule

06_IO_Devices/07_RTP/Readme.md

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+## 07 RTP
+
+The special function register `RTP`  memory mapped to addresses 4106 enables HACK to read bytes from the resistive touch panel controller chip AR1021 situated on MOD-LCD2.8RTP. The communication is protocol is SPI.
+
+**Attention:** The specification of AR1200 requires, that SCK is inverted (compare `03_SPI/Readme.md` with CPOL=1) and a slower transfer rate of max. 900kHz
+
+### Chip specification
+
+| IN/OUT | wire     | function                      |
+| ------ | -------- | ----------------------------- |
+| IN     | in[7:0]  | byte to be sent.              |
+| IN     | load     | =1 initiates the transmission |
+| OUT    | out[15]  | =0 chip is busy, =0 ready     |
+| OUT    | out[7:0] | received byte                 |
+| IN     | SDI      | serial data in                |
+| OUT    | SDO      | serial data out               |
+| OUT    | SCK      | serial clock                  |
+
+When load=1 transmission of byte in[7:0] is initiated. The byte is send to SDO bitwise together with 8 clock signals on SCK. At the same time `RTP` receives a byte at SDI. During transmission out[15] is 1. The transmission of a byte takes 256 clock cycles (32 cycles for each bit to achieve a slower transfer rate). Every 32 clock cycles one bit is shifted out. In the middle of each bit at counter number 31 the bit SDI is sampled. When transmission is completed out[15]=0 and `RTP` outputs the received byte to out[7:0].
+
+### Proposed Implementation
+
+Use a `Bit` to store the state (0 = ready, 1 = busy) which is output to out[15]. Use a counter `PC` that counts from 0 to 511. Finally we need a `BitShift8L`. It will be loaded with the byte in[7:0] to be send.  Use a `Bit` to sample the SDI line. After 8 bits are transmitted/received `RTP` cleares out[15] and outputs the received byte to in[7:0].
+
+**Attention:** sample on rising edge of SCK and shift on falling edge of SCK.
+
+![](RTP.png)
+
+### Memory map
+
+The special function register `RTP` is mapped to memory map of HACK according to:
+
+| address | I/O device | R/W | function                                                    |
+| ------- | ---------- | --- | ----------------------------------------------------------- |
+| 4106    | LCD        | W   | start transmittion of byte in[7:0]                          |
+| 4106    | LCD        | R   | out[15]=1 busy, out[15]=0 idle, out[7:0] last received byte |
+
+### RTP in real hardware
+
+The board MOD-LCD2.8RTP comes with a resistive touch panel controlled by a controller chip AR1021. MOD-LCD2.8RTP must be connected to iCE40HX1K-EVB with 3 more jumper wire cables according to `iCE40HX1K-EVB.pcf` (Compare with schematic [iCE40HX1K_EVB](../../doc/iCE40HX1K-EVB_Rev_B.pdf) and [MOD-LCD2.8RTP_RevB.pdf](../../doc/MOD-LCD2.8RTP_RevB.pdf).
+
+```
+set_io RTP_SDI 7        # PIO3_3A connected to pin 13 of GPIO1
+set_io RTP_SDO 8        # PIO3_3B connected to pin 15 of GPIO1
+set_io RTP_SCK 9        # PIO3_5A connected to pin 17 of GPIO1
+```
+
+| wire    | iCE40HX1K-EVB (GPIO1) | MOD-LCD2.8RTP (UEXT)               |
+| ------- | --------------------- | ---------------------------------- |
+| +3.3V   | 3                     | +3.3V                              |
+| GND     | 4                     | 2 GND                              |
+| LCD_DCX | 5                     | 7 D/C                              |
+| LCD_SDO | 7                     | 8 MOSI                             |
+| LCD_SCK | 9                     | 9 SCK                              |
+| LCD_CSX | 11                    | 10 CS                              |
+| RTP_SDI | 13                    | 4 IRQ/SDO (with solder jumper SJ3) |
+| RTP_SDO | 15                    | 6 SDA                              |
+| RTP_SCK | 17                    | 5 SCL                              |
+
+**Attention:** To enable SPI communication on the RTP controller chip AR1021 we must modify two solder jumpers. (Compare with schematic of MOD-LCD2.8RTP together with Datasheet of AR1021).
+
+1. Cut connection SJ1-GND with a sharp cutter knife. (green)
+
+2. Connect SJ1 to +3.3V to activate SPI mode of AR1021 (yellow)
+
+3. Connect SJ3 (UEXT pin4 with SDO) (yellow)
+
+![](jumper_rtp.jpg)
+
+***
+
+### Project
+
+* Implement special function register `RTP` and test with testbench:
+  
+  ```
+  $ cd 07_RTP
+  $ apio clean
+  $ apio sim
+  ```
+
+* Compare output `OUT` of special chip`RTP` with `CMP`.
+  
+  ![](rtp_tb.png)
+
+* Add special function register`RTP` to `HACK` at memory addresses 4106 and upload to iCE40HX1K-EVB with bootloader boot.asm preloaded into ROM.
+  
+  ```
+  $ cd ../05_GO
+  $ make
+  $ cd ../00_HACK
+  $ apio clean
+  $ apio upload
+  ```
+
+* Proceed to `07_Operating_System` and implement the driver class `Touch.jack` that sends command over `RTP` the controller chip AR1021 on MOD-LCD2.8RTP

06_IO_Devices/07_RTP/apio.ini

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+[env]
+board = iCE40-HX1K-EVB
+