added v2.0
This commit is contained in:
48
02_Boolean_Arithmetic/05_ALU/ALU_tb.gtkw
Normal file
48
02_Boolean_Arithmetic/05_ALU/ALU_tb.gtkw
Normal file
@@ -0,0 +1,48 @@
|
||||
[*]
|
||||
[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
|
||||
[*] Thu Dec 22 17:33:08 2022
|
||||
[*]
|
||||
[dumpfile] "/home/micha/gitlab/nand2tetris/02_Boolean_Arithmetic/05_ALU/ALU_tb.vcd"
|
||||
[dumpfile_mtime] "Thu Dec 22 17:32:45 2022"
|
||||
[dumpfile_size] 6961131
|
||||
[savefile] "/home/micha/gitlab/nand2tetris/02_Boolean_Arithmetic/05_ALU/ALU_tb.gtkw"
|
||||
[timestart] 0
|
||||
[size] 1920 963
|
||||
[pos] -1 -1
|
||||
*-1.000000 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
||||
[sst_width] 281
|
||||
[signals_width] 160
|
||||
[sst_expanded] 1
|
||||
[sst_vpaned_height] 258
|
||||
@200
|
||||
-IN
|
||||
@22
|
||||
ALU_tb.x[15:0]
|
||||
ALU_tb.y[15:0]
|
||||
@28
|
||||
ALU_tb.zx
|
||||
ALU_tb.nx
|
||||
ALU_tb.zy
|
||||
ALU_tb.ny
|
||||
ALU_tb.f
|
||||
ALU_tb.no
|
||||
@200
|
||||
-OUT
|
||||
@22
|
||||
ALU_tb.out[15:0]
|
||||
@28
|
||||
ALU_tb.zr
|
||||
ALU_tb.ng
|
||||
@200
|
||||
-CMP
|
||||
@22
|
||||
ALU_tb.out_cmp[15:0]
|
||||
@28
|
||||
ALU_tb.zr_cmp
|
||||
ALU_tb.ng_cmp
|
||||
@201
|
||||
-Test
|
||||
@28
|
||||
ALU_tb.fail
|
||||
[pattern_trace] 1
|
||||
[pattern_trace] 0
|
81
02_Boolean_Arithmetic/05_ALU/ALU_tb.v
Normal file
81
02_Boolean_Arithmetic/05_ALU/ALU_tb.v
Normal file
@@ -0,0 +1,81 @@
|
||||
`default_nettype none
|
||||
module ALU_tb();
|
||||
|
||||
// IN,OUT
|
||||
reg [15:0] x,y;
|
||||
reg zx,nx,zy,ny,f,no;
|
||||
wire [15:0] out;
|
||||
wire zr,ng;
|
||||
|
||||
// Part
|
||||
ALU ALU(
|
||||
.x(x),
|
||||
.y(y),
|
||||
.zx(zx),
|
||||
.nx(nx),
|
||||
.zy(zy),
|
||||
.ny(ny),
|
||||
.f(f),
|
||||
.no(no),
|
||||
.out(out),
|
||||
.zr(zr),
|
||||
.ng(ng)
|
||||
);
|
||||
|
||||
// Compare
|
||||
wire [15:0] xx,yy,out_cmp;
|
||||
wire zr_cmp,ng_cmp;
|
||||
assign xx = nx?(zx?~0:~x):(zx?0:x);
|
||||
assign yy = ny?(zy?~0:~y):(zy?0:y);
|
||||
assign out_cmp= no?(f?~(xx+yy):~(xx&yy)):(f?(xx+yy):(xx&yy));
|
||||
assign zr_cmp = (out==0);
|
||||
assign ng_cmp = out[15];
|
||||
|
||||
reg fail = 0;
|
||||
reg [15:0] n = 0;
|
||||
task check;
|
||||
#1
|
||||
if ((out != out_cmp) || (zr != zr_cmp) || (ng != ng_cmp))
|
||||
begin
|
||||
$display("FAIL: x=%16b, y=%16b, zx=%1b, nx=%1b, zy=%1b, ny=%1b, f=%1b, no=%1b, out=%16b, zr=%1b, ng=%1b",x,y,zx,nx,zy,ny,f,no,out,zr,ng);
|
||||
fail=1;
|
||||
end
|
||||
endtask
|
||||
|
||||
initial begin
|
||||
$dumpfile("ALU_tb.vcd");
|
||||
$dumpvars(0, ALU_tb);
|
||||
|
||||
$display("------------------------");
|
||||
$display("Testbench: ALU");
|
||||
|
||||
for (n=0; n<100;n=n+1)
|
||||
begin
|
||||
x=$random;
|
||||
y=$random;
|
||||
zx=1;nx=0;zy=1;ny=0;f=1;no=0;check();// 0
|
||||
zx=1;nx=1;zy=1;ny=1;f=1;no=1;check();// 1
|
||||
zx=1;nx=1;zy=1;ny=0;f=1;no=0;check();// -1
|
||||
zx=0;nx=0;zy=1;ny=1;f=0;no=0;check();// x
|
||||
zx=1;nx=1;zy=0;ny=0;f=0;no=0;check();// y
|
||||
zx=0;nx=0;zy=1;ny=1;f=0;no=1;check();// !x
|
||||
zx=1;nx=1;zy=0;ny=0;f=0;no=1;check();// !y
|
||||
zx=0;nx=0;zy=1;ny=1;f=1;no=1;check();// -x
|
||||
zx=1;nx=1;zy=0;ny=0;f=1;no=1;check();// -y
|
||||
zx=0;nx=1;zy=1;ny=1;f=1;no=1;check();// x+1
|
||||
zx=1;nx=1;zy=0;ny=1;f=1;no=1;check();// y+1
|
||||
zx=0;nx=0;zy=1;ny=1;f=1;no=0;check();// x-1
|
||||
zx=1;nx=1;zy=0;ny=0;f=1;no=0;check();// y-1
|
||||
zx=0;nx=0;zy=0;ny=0;f=1;no=0;check();// x+y
|
||||
zx=0;nx=1;zy=0;ny=0;f=1;no=1;check();// x-y
|
||||
zx=0;nx=0;zy=0;ny=1;f=1;no=1;check();// y-x
|
||||
zx=0;nx=0;zy=0;ny=0;f=0;no=0;check();// x&y
|
||||
zx=0;nx=1;zy=0;ny=1;f=0;no=1;check();// x|y
|
||||
end
|
||||
|
||||
if (fail==0) $display("passed");
|
||||
$display("------------------------");
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
24
02_Boolean_Arithmetic/05_ALU/Include.v
Normal file
24
02_Boolean_Arithmetic/05_ALU/Include.v
Normal file
@@ -0,0 +1,24 @@
|
||||
`include "../../01_Boolean_Logic/Nand.v"
|
||||
`include "../../01_Boolean_Logic/Not.v"
|
||||
`include "../../01_Boolean_Logic/Buffer.v"
|
||||
`include "../../01_Boolean_Logic/And.v"
|
||||
`include "../../01_Boolean_Logic/Or.v"
|
||||
`include "../../01_Boolean_Logic/Xor.v"
|
||||
`include "../../01_Boolean_Logic/Mux.v"
|
||||
`include "../../01_Boolean_Logic/DMux.v"
|
||||
`include "../../01_Boolean_Logic/Not16.v"
|
||||
`include "../../01_Boolean_Logic/And16.v"
|
||||
`include "../../01_Boolean_Logic/Or16.v"
|
||||
`include "../../01_Boolean_Logic/Mux16.v"
|
||||
`include "../../01_Boolean_Logic/Or8Way.v"
|
||||
`include "../../01_Boolean_Logic/Mux4Way16.v"
|
||||
`include "../../01_Boolean_Logic/Mux8Way16.v"
|
||||
`include "../../01_Boolean_Logic/DMux4Way.v"
|
||||
`include "../../01_Boolean_Logic/DMux8Way.v"
|
||||
|
||||
`include "../../02_Boolean_Arithmetic/HalfAdder.v"
|
||||
`include "../../02_Boolean_Arithmetic/FullAdder.v"
|
||||
`include "../../02_Boolean_Arithmetic/Add16.v"
|
||||
`include "../../02_Boolean_Arithmetic/Inc16.v"
|
||||
`include "../../02_Boolean_Arithmetic/ALU.v"
|
||||
|
3
02_Boolean_Arithmetic/05_ALU/apio.ini
Normal file
3
02_Boolean_Arithmetic/05_ALU/apio.ini
Normal file
@@ -0,0 +1,3 @@
|
||||
[env]
|
||||
board = iCE40-HX1K-EVB
|
||||
|
Reference in New Issue
Block a user