added v2.0

This commit is contained in:
Michael Schröder
2023-01-11 11:13:09 +01:00
parent 2a5a64ca91
commit 971b323822
584 changed files with 159319 additions and 0 deletions

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[*]
[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
[*] Thu Dec 22 17:31:12 2022
[*]
[dumpfile] "/home/micha/gitlab/nand2tetris/02_Boolean_Arithmetic/02_FullAdder/FullAdder_tb.vcd"
[dumpfile_mtime] "Thu Dec 22 17:30:26 2022"
[dumpfile_size] 3773
[savefile] "/home/micha/gitlab/nand2tetris/02_Boolean_Arithmetic/02_FullAdder/FullAdder_tb.gtkw"
[timestart] 0
[size] 1000 600
[pos] -1 -1
*-1.619024 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 281
[signals_width] 150
[sst_expanded] 1
[sst_vpaned_height] 132
@200
-IN
@28
FullAdder_tb.a
FullAdder_tb.b
FullAdder_tb.c
@200
-OUT
@28
FullAdder_tb.sum
FullAdder_tb.carry
@200
-CMP
@28
(1)FullAdder_tb.out_cmp[1:0]
(0)FullAdder_tb.out_cmp[1:0]
@200
-Test
@28
FullAdder_tb.fail
[pattern_trace] 1
[pattern_trace] 0

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`default_nettype none
module FullAdder_tb();
// IN,OUT
reg a,b,c;
wire sum,carry;
// Part
FullAdder FULLADDER(
.a(a),
.b(b),
.c(c),
.sum(sum),
.carry(carry)
);
// Compare
wire [1:0] out_cmp;
assign out_cmp = a+b+c;
reg fail = 0;
task check;
#1
if ({carry,sum} != out_cmp)
begin
$display("FAIL: a=%1b, b=%1b, c=%1b, sum=%1b, carry=%1b",a,b,c,sum,carry);
fail=1;
end
endtask
initial begin
$dumpfile("FullAdder_tb.vcd");
$dumpvars(0, FullAdder_tb);
$display("------------------------");
$display("Testbench: FullAdder");
a=0;b=0;c=0;check();
a=0;b=0;c=1;check();
a=0;b=1;c=0;check();
a=0;b=1;c=1;check();
a=1;b=0;c=0;check();
a=1;b=0;c=1;check();
a=1;b=1;c=0;check();
a=1;b=1;c=1;check();
if (fail==0) $display("passed");
$display("------------------------");
$finish;
end
endmodule

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`include "../../01_Boolean_Logic/Nand.v"
`include "../../01_Boolean_Logic/Not.v"
`include "../../01_Boolean_Logic/Buffer.v"
`include "../../01_Boolean_Logic/And.v"
`include "../../01_Boolean_Logic/Or.v"
`include "../../01_Boolean_Logic/Xor.v"
`include "../../01_Boolean_Logic/Mux.v"
`include "../../01_Boolean_Logic/DMux.v"
`include "../../01_Boolean_Logic/Not16.v"
`include "../../01_Boolean_Logic/And16.v"
`include "../../01_Boolean_Logic/Or16.v"
`include "../../01_Boolean_Logic/Mux16.v"
`include "../../01_Boolean_Logic/Or8Way.v"
`include "../../01_Boolean_Logic/Mux4Way16.v"
`include "../../01_Boolean_Logic/Mux8Way16.v"
`include "../../01_Boolean_Logic/DMux4Way.v"
`include "../../01_Boolean_Logic/DMux8Way.v"
`include "../../02_Boolean_Arithmetic/HalfAdder.v"
`include "../../02_Boolean_Arithmetic/FullAdder.v"
`include "../../02_Boolean_Arithmetic/Add16.v"
`include "../../02_Boolean_Arithmetic/Inc16.v"
`include "../../02_Boolean_Arithmetic/ALU.v"

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[env]
board = iCE40-HX1K-EVB