added v2.0

This commit is contained in:
Michael Schröder
2023-01-11 11:13:09 +01:00
parent 2a5a64ca91
commit 971b323822
584 changed files with 159319 additions and 0 deletions

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[*]
[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
[*] Thu Dec 22 14:39:25 2022
[*]
[dumpfile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/16_DMux8Way/DMux8Way_tb.vcd"
[dumpfile_mtime] "Thu Dec 22 14:38:18 2022"
[dumpfile_size] 10742
[savefile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/16_DMux8Way/DMux8Way_tb.gtkw"
[timestart] 0
[size] 1669 793
[pos] -1 -1
*-1.619024 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 281
[signals_width] 110
[sst_expanded] 1
[sst_vpaned_height] 197
@200
-IN
@28
DMux8Way_tb.in
DMux8Way_tb.sel[2:0]
@200
-OUT
@28
DMux8Way_tb.a
DMux8Way_tb.b
DMux8Way_tb.c
DMux8Way_tb.d
DMux8Way_tb.e
DMux8Way_tb.f
DMux8Way_tb.g
DMux8Way_tb.h
@200
-CMP
@28
DMux8Way_tb.a_cmp
DMux8Way_tb.b_cmp
DMux8Way_tb.c_cmp
DMux8Way_tb.d_cmp
DMux8Way_tb.e_cmp
DMux8Way_tb.f_cmp
DMux8Way_tb.g_cmp
DMux8Way_tb.h_cmp
@201
-Test
@28
DMux8Way_tb.fail
[pattern_trace] 1
[pattern_trace] 0

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`default_nettype none
module DMux8Way_tb();
// IN,OUT
reg in;
reg [2:0] sel;
wire a,b,c,d,e,f,g,h;
// Part
DMux8Way DMUX8WAY(
.in(in),
.sel(sel),
.a(a),
.b(b),
.c(c),
.d(d),
.e(e),
.f(f),
.g(g),
.h(h)
);
// Compare
wire a_cmp,b_cmp,c_cmp,d_cmp,e_cmp,f_cmp,g_cmp,h_cmp;
assign a_cmp = (sel==0)?in:0;
assign b_cmp = (sel==1)?in:0;
assign c_cmp = (sel==2)?in:0;
assign d_cmp = (sel==3)?in:0;
assign e_cmp = (sel==4)?in:0;
assign f_cmp = (sel==5)?in:0;
assign g_cmp = (sel==6)?in:0;
assign h_cmp = (sel==7)?in:0;
reg fail = 0;
task check;
#1
if ((a!=a_cmp)||(b!=b_cmp)||(c!=c_cmp)||(d!=d_cmp)||(e!=e_cmp)||(f!=f_cmp)||(g!=g_cmp)||(h!=h_cmp))
begin
$display("FAIL: in=%1b, sel=%2b, a=%1b, b=%1b, c=%1b, d=%1b, e=%1b, f=%1b, g=%1b, h=%1b",in,sel,a,b,c,d,e,f,g,h);
fail=1;
end
endtask
// Test
initial begin
$dumpfile("DMux8Way_tb.vcd");
$dumpvars(0, DMux8Way_tb);
$display("------------------------");
$display("Testbench: DMux8Way");
in=0;sel=0;check();
in=0;sel=1;check();
in=0;sel=2;check();
in=0;sel=3;check();
in=0;sel=4;check();
in=0;sel=5;check();
in=0;sel=6;check();
in=0;sel=7;check();
in=1;sel=0;check();
in=1;sel=1;check();
in=1;sel=2;check();
in=1;sel=3;check();
in=1;sel=4;check();
in=1;sel=5;check();
in=1;sel=6;check();
in=1;sel=7;check();
if (fail==0) $display("passed");
$display("------------------------");
$finish;
end
endmodule

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`include "../../01_Boolean_Logic/Nand.v"
`include "../../01_Boolean_Logic/Not.v"
`include "../../01_Boolean_Logic/Buffer.v"
`include "../../01_Boolean_Logic/And.v"
`include "../../01_Boolean_Logic/Or.v"
`include "../../01_Boolean_Logic/Xor.v"
`include "../../01_Boolean_Logic/Mux.v"
`include "../../01_Boolean_Logic/DMux.v"
`include "../../01_Boolean_Logic/Not16.v"
`include "../../01_Boolean_Logic/Buffer16.v"
`include "../../01_Boolean_Logic/And16.v"
`include "../../01_Boolean_Logic/Or16.v"
`include "../../01_Boolean_Logic/Mux16.v"
`include "../../01_Boolean_Logic/Or8Way.v"
`include "../../01_Boolean_Logic/Mux4Way16.v"
`include "../../01_Boolean_Logic/Mux8Way16.v"
`include "../../01_Boolean_Logic/DMux4Way.v"
`include "../../01_Boolean_Logic/DMux8Way.v"

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[env]
board = iCE40-HX1K-EVB