added v2.0

This commit is contained in:
Michael Schröder
2023-01-11 11:13:09 +01:00
parent 2a5a64ca91
commit 971b323822
584 changed files with 159319 additions and 0 deletions

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`include "../../01_Boolean_Logic/Nand.v"
`include "../../01_Boolean_Logic/Not.v"
`include "../../01_Boolean_Logic/Buffer.v"
`include "../../01_Boolean_Logic/And.v"
`include "../../01_Boolean_Logic/Or.v"
`include "../../01_Boolean_Logic/Xor.v"
`include "../../01_Boolean_Logic/Mux.v"
`include "../../01_Boolean_Logic/DMux.v"
`include "../../01_Boolean_Logic/Not16.v"
`include "../../01_Boolean_Logic/Buffer16.v"
`include "../../01_Boolean_Logic/And16.v"
`include "../../01_Boolean_Logic/Or16.v"
`include "../../01_Boolean_Logic/Mux16.v"
`include "../../01_Boolean_Logic/Or8Way.v"

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[*]
[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
[*] Thu Dec 22 14:44:04 2022
[*]
[dumpfile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/12_Or8Way/Or8Way_tb.vcd"
[dumpfile_mtime] "Thu Dec 22 14:43:43 2022"
[dumpfile_size] 792009
[savefile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/12_Or8Way/Or8Way_tb.gtkw"
[timestart] 0
[size] 1920 963
[pos] -1 -1
*-2.000000 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 281
[signals_width] 100
[sst_expanded] 1
[sst_vpaned_height] 259
@200
-IN
@22
Or8Way_tb.in[7:0]
@200
-OUT
@28
Or8Way_tb.out
@200
-CMP
@28
Or8Way_tb.out_cmp
@201
-Test
@28
Or8Way_tb.fail
[pattern_trace] 1
[pattern_trace] 0

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`default_nettype none
module Or8Way_tb();
// IN,OUT
reg [7:0] in;
wire out;
// Part
Or8Way OR8WAY(
.in(in),
.out(out)
);
// Compare
wire out_cmp;
assign out_cmp = |in;
reg fail = 0;
reg [15:0] n=0;
task check;
#1
if (out != out_cmp)
begin
$display("FAIL: in=%8b, out=%1b",in,out);
fail=1;
end
endtask
// Test
initial begin
$dumpfile("Or8Way_tb.vcd");
$dumpvars(0, Or8Way_tb);
$display("------------------------");
$display("Testbench: Or8Way");
in=0;
check();
for (n=0; n<10000;n=n+1)
begin
in=$random;
check();
end
if (fail==0) $display("passed");
$display("------------------------");
$finish;
end
endmodule

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[env]
board = iCE40-HX1K-EVB