added v2.0
This commit is contained in:
34
01_Boolean_Logic/09_Buffer16/Buffer16_tb.gtkw
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34
01_Boolean_Logic/09_Buffer16/Buffer16_tb.gtkw
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[*]
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[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
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[*] Wed Jan 4 11:28:38 2023
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[*]
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[dumpfile] "/home/micha/gitlab/nand2tetris-fpga/01_Boolean_Logic/09_Buffer16/Buffer16_tb.vcd"
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[dumpfile_mtime] "Wed Jan 4 11:27:59 2023"
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[dumpfile_size] 3089054
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[savefile] "/home/micha/gitlab/nand2tetris-fpga/01_Boolean_Logic/09_Buffer16/Buffer16_tb.gtkw"
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[timestart] 0
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[size] 1547 481
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[pos] -1 -1
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*0.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[sst_width] 281
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[signals_width] 160
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[sst_expanded] 1
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[sst_vpaned_height] 91
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@200
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-IN
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@23
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Buffer16_tb.in[15:0]
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@200
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-OUT
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@22
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Buffer16_tb.out[15:0]
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@200
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-CMP
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@22
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Buffer16_tb.out_cmp[15:0]
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@200
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-Test
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@28
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Buffer16_tb.fail
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[pattern_trace] 1
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[pattern_trace] 0
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49
01_Boolean_Logic/09_Buffer16/Buffer16_tb.v
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49
01_Boolean_Logic/09_Buffer16/Buffer16_tb.v
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`default_nettype none
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module Buffer16_tb();
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// IN,OUT
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reg [15:0] in;
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wire [15:0] out;
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// Part
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Buffer16 BUFFER16(
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.in(in),
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.out(out)
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);
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// Compare
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wire [15:0] out_cmp;
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assign out_cmp = in;
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reg fail = 0;
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reg [15:0] n = 0;
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task check;
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#1
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if (out != out_cmp)
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begin
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$display("FAIL: in=%16b, out=%16b",in,out);
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fail=1;
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end
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endtask
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// Test
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initial begin
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$dumpfile("Buffer16_tb.vcd");
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$dumpvars(0, Buffer16_tb);
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$display("------------------------");
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$display("Testbench: Buffer16");
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for (n=0; n<10000;n=n+1)
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begin
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in=$random;
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check();
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end
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if (fail==0) $display("passed");
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$display("------------------------");
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$finish;
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end
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endmodule
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10
01_Boolean_Logic/09_Buffer16/Include.v
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10
01_Boolean_Logic/09_Buffer16/Include.v
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`include "../../01_Boolean_Logic/Nand.v"
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`include "../../01_Boolean_Logic/Not.v"
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`include "../../01_Boolean_Logic/Buffer.v"
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`include "../../01_Boolean_Logic/And.v"
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`include "../../01_Boolean_Logic/Or.v"
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`include "../../01_Boolean_Logic/Xor.v"
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`include "../../01_Boolean_Logic/Mux.v"
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`include "../../01_Boolean_Logic/DMux.v"
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`include "../../01_Boolean_Logic/Not16.v"
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`include "../../01_Boolean_Logic/Buffer16.v"
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3
01_Boolean_Logic/09_Buffer16/apio.ini
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3
01_Boolean_Logic/09_Buffer16/apio.ini
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@@ -0,0 +1,3 @@
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[env]
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board = iCE40-HX1K-EVB
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