added v2.0

01_Boolean_Logic/07_DMux/DMux_tb.gtkw

@@ -0,0 +1,37 @@
+[*]
+[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
+[*] Thu Dec 22 14:49:10 2022
+[*]
+[dumpfile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/07_DMux/DMux_tb.vcd"
+[dumpfile_mtime] "Thu Dec 22 14:48:46 2022"
+[dumpfile_size] 1611
+[savefile] "/home/micha/gitlab/nand2tetris/01_Boolean_Logic/07_DMux/DMux_tb.gtkw"
+[timestart] 0
+[size] 1355 600
+[pos] -1 -1
+*-0.771027 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[sst_width] 281
+[signals_width] 80
+[sst_expanded] 1
+[sst_vpaned_height] 132
+@200
+-IN
+@28
+DMux_tb.in
+DMux_tb.sel
+@200
+-OUT
+@28
+DMux_tb.a
+DMux_tb.b
+@200
+-CMP
+@28
+DMux_tb.a_cmp
+DMux_tb.b_cmp
+@200
+-Test
+@29
+DMux_tb.fail
+[pattern_trace] 1
+[pattern_trace] 0

01_Boolean_Logic/07_DMux/DMux_tb.v

@@ -0,0 +1,49 @@
+`default_nettype none
+module DMux_tb();
+
+	// IN,OUT
+	reg in,sel;
+	wire a,b;
+	
+	// Part
+	DMux DMUX(
+		.in(in),
+		.sel(sel),
+		.a(a),
+		.b(b)
+	);
+
+	// Compare
+	wire a_cmp,b_cmp;
+	assign a_cmp = (~sel&in);
+	assign b_cmp = sel∈
+
+	reg fail=0;
+	task check;
+		#1
+		if ((a != a_cmp) || (b != b_cmp)) 
+			begin
+				$display("FAIL: in=%1b, sel=%1b, a=%1b, b=%1b",in,sel,a,b);
+				fail=1;
+			end
+	endtask
+	
+	// Test 
+  	initial begin
+  		$dumpfile("DMux_tb.vcd");
+  		$dumpvars(0, DMux_tb);
+		
+		$display("------------------------");
+		$display("Testbench: DMux");
+		
+		in=0;sel=0;check();
+		in=0;sel=1;check();
+		in=1;sel=0;check();
+		in=1;sel=1;check();
+		
+		if (fail==0) $display("passed");
+		$display("------------------------");
+		$finish;
+	end
+
+endmodule

01_Boolean_Logic/07_DMux/Include.v

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+`include "../../01_Boolean_Logic/Nand.v"
+`include "../../01_Boolean_Logic/Not.v"
+`include "../../01_Boolean_Logic/Buffer.v"
+`include "../../01_Boolean_Logic/And.v"
+`include "../../01_Boolean_Logic/Or.v"
+`include "../../01_Boolean_Logic/Xor.v"
+`include "../../01_Boolean_Logic/Mux.v"
+`include "../../01_Boolean_Logic/DMux.v"

01_Boolean_Logic/07_DMux/apio.ini

@@ -0,0 +1,3 @@
+[env]
+board = iCE40-HX1K-EVB
+

01_Boolean_Logic/07_DMux/iCE40HX1K.pcf

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+# physical constrain file
+# assign io-pins to pin numbering of iCE40-HX1K on olimex board iCE40-HX1K-EVB
+# compare to the schematic of the board and the datasheet of fpga
+
+set_io BUT1 41	# BUT1
+set_io BUT2 42	# BUT2
+
+set_io LED1 40	# LED1
+set_io LED2 51	# LED2
+

01_Boolean_Logic/07_DMux/top.v

@@ -0,0 +1,11 @@
+`default_nettype none
+module top(
+	input BUT1,
+	input BUT2,
+	output LED1,
+	output LED2
+);
+
+	DMux DMUX(.in(BUT1),.sel(BUT2),.a(LED1),.b(LED2));
+	
+endmodule