typo in description of in[8]
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@ -6,18 +6,18 @@ The special function register `SPI` memory mapped to address 4100 enables HACK
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### Chip specification
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| IN/OUT | wire | function |
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| ------ | -------- | ------------------------------------------- |
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| IN | in[7:0] | byte to be sent. |
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| IN | in[8] | =1 send byte and set CSX low |
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| IN | in[8] | =0 pull CSX high without sending byte |
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| IN | load | =1 initiates the transmission, when in[8]=1 |
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| OUT | out[15] | =0 chip is busy, =0 chip is ready |
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| OUT | out[7:0] | received byte (when out[15]=0) |
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| OUT | CSX | chip select not |
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| OUT | SDO | serial data out |
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| OUT | SCK | serial clock |
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| IN | SDI | serial data in |
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| IN/OUT | wire | function |
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| ------ | -------- | --------------------------------------------------- |
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| IN | in[7:0] | byte to be sent. |
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| IN | in[8] | =0 (and load=1) send byte and set CSX low |
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| IN | in[8] | =1 (and load =1) pull CSX high without sending byte |
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| IN | load | =1 initiates the transmission, when in[8]=0 |
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| OUT | out[15] | =0 chip is busy, =0 chip is ready |
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| OUT | out[7:0] | received byte (when out[15]=0) |
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| OUT | CSX | chip select not |
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| OUT | SDO | serial data out |
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| OUT | SCK | serial clock |
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| IN | SDI | serial data in |
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When load=1 and in[8]=0 transmission of byte in[7:0] is initiated. CSX is goes low (and stays low even when transmission is completed). The byte is send to SDO bitwise together with 8 clock signals on SCK. At the same time the SPI receives a byte at SDI. During transmission out[15] is 1. After 16 clock cycles the transmission of one byte is completed. out[15] goes low and SPI outputs the received byte to out[7:0].
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