// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/03/b/RAM4K.hdl /** * Memory of 4K registers, each 16 bit-wide. Out holds the value * stored at the memory location specified by address. If load==1, then * the in value is loaded into the memory location specified by address * (the loaded value will be emitted to out from the next time step onward). */ CHIP RAM4K { IN in[16], load, address[12]; OUT out[16]; PARTS: // Put your code here: DMux8Way(in=load, sel=address[9..11], a=toRAM512A, b=toRAM512B, c=toRAM512C, d=toRAM512D, e=toRAM512E, f=toRAM512F, g=toRAM512G, h=toRAM512H); RAM512(in=in, load=toRAM512A, address=address[0..8], out=fromRAM512A); RAM512(in=in, load=toRAM512B, address=address[0..8], out=fromRAM512B); RAM512(in=in, load=toRAM512C, address=address[0..8], out=fromRAM512C); RAM512(in=in, load=toRAM512D, address=address[0..8], out=fromRAM512D); RAM512(in=in, load=toRAM512E, address=address[0..8], out=fromRAM512E); RAM512(in=in, load=toRAM512F, address=address[0..8], out=fromRAM512F); RAM512(in=in, load=toRAM512G, address=address[0..8], out=fromRAM512G); RAM512(in=in, load=toRAM512H, address=address[0..8], out=fromRAM512H); Mux8Way16(sel=address[9..11], out=out, a=fromRAM512A, b=fromRAM512B, c=fromRAM512C, d=fromRAM512D, e=fromRAM512E, f=fromRAM512F, g=fromRAM512G, h=fromRAM512H); }