34 lines
1.3 KiB
Plaintext
34 lines
1.3 KiB
Plaintext
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/03/b/RAM16K.hdl
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/**
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* Memory of 16K registers, each 16 bit-wide. Out holds the value
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* stored at the memory location specified by address. If load==1, then
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* the in value is loaded into the memory location specified by address
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* (the loaded value will be emitted to out from the next time step onward).
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*/
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CHIP RAM16K {
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IN in[16], load, address[14];
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OUT out[16];
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PARTS:
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// Put your code here:
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DMux4Way(in=load, sel=address[12..13], a=toRAM4KA,
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b=toRAM4KB,
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c=toRAM4KC,
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d=toRAM4KD);
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RAM4K(in=in, load=toRAM4KA, address=address[0..11], out=fromRAM4KA);
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RAM4K(in=in, load=toRAM4KB, address=address[0..11], out=fromRAM4KB);
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RAM4K(in=in, load=toRAM4KC, address=address[0..11], out=fromRAM4KC);
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RAM4K(in=in, load=toRAM4KD, address=address[0..11], out=fromRAM4KD);
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Mux4Way16(sel=address[12..13], out=out, a=fromRAM4KA,
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b=fromRAM4KB,
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c=fromRAM4KC,
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d=fromRAM4KD);
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}
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