nand2tetris/projects/03/a/RAM64.hdl

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2021-12-23 14:14:21 +00:00
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM64.hdl
/**
* Memory of 64 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM64 {
IN in[16], load, address[6];
OUT out[16];
PARTS:
// Put your code here:
DMux8Way(in=load, sel=address[3..5], a=toRAM8A,
b=toRAM8B,
c=toRAM8C,
d=toRAM8D,
e=toRAM8E,
f=toRAM8F,
g=toRAM8G,
h=toRAM8H);
RAM8(in=in, load=toRAM8A, address=address[0..2], out=fromRAM8A);
RAM8(in=in, load=toRAM8B, address=address[0..2], out=fromRAM8B);
RAM8(in=in, load=toRAM8C, address=address[0..2], out=fromRAM8C);
RAM8(in=in, load=toRAM8D, address=address[0..2], out=fromRAM8D);
RAM8(in=in, load=toRAM8E, address=address[0..2], out=fromRAM8E);
RAM8(in=in, load=toRAM8F, address=address[0..2], out=fromRAM8F);
RAM8(in=in, load=toRAM8G, address=address[0..2], out=fromRAM8G);
RAM8(in=in, load=toRAM8H, address=address[0..2], out=fromRAM8H);
Mux8Way16(sel=address[3..5], out=out, a=fromRAM8A,
b=fromRAM8B,
c=fromRAM8C,
d=fromRAM8D,
e=fromRAM8E,
f=fromRAM8F,
g=fromRAM8G,
h=fromRAM8H);
}