nand2/05_Computer_Architecture/ROM.v
Michael Schröder 971b323822 added v2.0
2023-01-11 23:04:57 +01:00

27 lines
506 B
Verilog

/**
* instruction memory at boot time
* The instruction memory is read only (ROM) and
* preloaded with 256 x 16bit of Hackcode holding the bootloader.
*
* instruction = ROM[pc]
*/
`default_nettype none
module ROM(
input [15:0] pc,
output [15:0] instruction
);
// No need to implement this chip
// The file ROM.BIN holds the hack code
parameter ROMFILE = "ROM.hack";
reg [15:0] mem [0:255];
assign instruction = mem[pc[7:0]];
initial begin
$readmemb(ROMFILE,mem);
end
endmodule