12 lines
155 B
Verilog
12 lines
155 B
Verilog
`default_nettype none
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module top(
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input BUT1,
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input BUT2,
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output LED1,
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output LED2
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);
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DMux DMUX(.in(BUT1),.sel(BUT2),.a(LED1),.b(LED2));
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endmodule
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