/**
 * And gate: 
 * out = 1 if (a == 1 and b == 1)
 *       0 otherwise
 */

`default_nettype none
module And(
    input a,
    input b,
    output out
);

    // Put your code here:
    wire nand1;

    Nand NAND1(a, b, nand1);
    Nand NAND2(nand1, nand1, out);
endmodule