20 lines
487 B
Coq
20 lines
487 B
Coq
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// Test to run on fpga with 100 MHz
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`default_nettype none
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module blinky(
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input CLK,
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output [1:0] LED
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);
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wire [15:0] prescaler;
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wire clk;
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PC PRESCALER(.clk(CLK),.load(1'b0),.in(16'b0),.reset(1'b0),.inc(1'b1),.out(prescaler));
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Buffer CLOCK(.in(prescaler[12]),.out(clk));
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wire [15:0] counter;
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PC COUNTER(.clk(clk),.load(1'b0),.in(16'b0),.reset(1'b0),.inc(1'b1),.out(counter));
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Buffer BUF1(.in(counter[15]),.out(LED[1]));
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Buffer BUF2(.in(counter[14]),.out(LED[0]));
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endmodule
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